PUBLISHABLE EXECUTIVE SUMMARY The second reporting Period of the Chemaph project was devoted to the development of phase change materials by MOCVD, together with their structural, chemical and functional characterisation. Following the indications of the Reviewers, the timing was strictly monitored in order to manage to install the Aixtron MOCVD reactor in the MDM laboratory in the scheduled time frame. Several deposition runs were performed and different chemical compositions including Ge2Sb2Te5, GeTe and Sb2Te3 were tried. Unfortunately, although the right chemical composition and crystallographic structures are demonstrated, the deposition of continuous, smooth chalcogenide thin films was not achieved till now. The achieved results have been discussed and a workplan has been defined to improve the deposition process. At VU, the modification of the existing substrate holder allowed us to avoid the problem of material accumulation at the reactor walls. With this cold walls reactor, the results were very similar to those obtained by MDM. A second major modification of the VU reactor included a sample holder perpendicular to the vapour flow, including both an internal heating, and a hollow pre-heating furnace able to enhance precursor decomposition. In this way, the first, reproducible, thin and smooth layers of chalcogenide material were obtained at VU. The optimisation of the chemical composition is now running, and the spread of sample for deeper structural, functional, and electrical characterization is scheduled for the first half of December. Meantime, successful functional characterisation of sputtered deposited Ge2Sb2Te5 was performed. The results where presented at conferences and gathered in one submitted publication. Following the time schedule fixed by the new Description of Work, alternative chalcogenide materials and dopants for Ge2Sb2Te5 were evaluated by the consortium. Both usefulness in terms of reported electrical performance, the availability of precursors, their compatibility with the actual selected process, together with the safety issues set by the selected scrubbing system and sensors apparatus have been taken into account. Three doping elements have been selected, with the following order of priority, to be integrated within the Aixtron reactor: 1. N 2. Si 3. Se The deposition by different MOCVD techniques, together with the exploration of new chemistries for phase change materials to be implemented in next generation non volatile memory devices are the subject of current dissemination of this project. The expected final results, i.e 90 or 45 nm demonstrator of phase change memory device including MOCVD chalcogenide material will have a strong impact on the microelectronic community, since devices including MOCVD grown chalcogenide materials were solely recently reported by Samsung Electronics Co. ("Highly Scalable Phase Change Memory with CVD GeSbTe for Sub 50nm Generation", J.I. Lee, H. Park, S.L. Cho, Y.L. Park, B.J. Bae, J.H. Park, J.S. Park, H.G. An, J.S. Bae, D.H. Ahn, Y.T. Kim, H. Horii, S. A. Song , J.C. Shin, S.O. Park, H.S. Kim, UIn. Chung, J.T. Moon, and B.I. Ryu, VLSI Tech dig. P1203 2007).
CHEMAPH-2007-P2 periodic activity report
wiemer c
2007
Abstract
PUBLISHABLE EXECUTIVE SUMMARY The second reporting Period of the Chemaph project was devoted to the development of phase change materials by MOCVD, together with their structural, chemical and functional characterisation. Following the indications of the Reviewers, the timing was strictly monitored in order to manage to install the Aixtron MOCVD reactor in the MDM laboratory in the scheduled time frame. Several deposition runs were performed and different chemical compositions including Ge2Sb2Te5, GeTe and Sb2Te3 were tried. Unfortunately, although the right chemical composition and crystallographic structures are demonstrated, the deposition of continuous, smooth chalcogenide thin films was not achieved till now. The achieved results have been discussed and a workplan has been defined to improve the deposition process. At VU, the modification of the existing substrate holder allowed us to avoid the problem of material accumulation at the reactor walls. With this cold walls reactor, the results were very similar to those obtained by MDM. A second major modification of the VU reactor included a sample holder perpendicular to the vapour flow, including both an internal heating, and a hollow pre-heating furnace able to enhance precursor decomposition. In this way, the first, reproducible, thin and smooth layers of chalcogenide material were obtained at VU. The optimisation of the chemical composition is now running, and the spread of sample for deeper structural, functional, and electrical characterization is scheduled for the first half of December. Meantime, successful functional characterisation of sputtered deposited Ge2Sb2Te5 was performed. The results where presented at conferences and gathered in one submitted publication. Following the time schedule fixed by the new Description of Work, alternative chalcogenide materials and dopants for Ge2Sb2Te5 were evaluated by the consortium. Both usefulness in terms of reported electrical performance, the availability of precursors, their compatibility with the actual selected process, together with the safety issues set by the selected scrubbing system and sensors apparatus have been taken into account. Three doping elements have been selected, with the following order of priority, to be integrated within the Aixtron reactor: 1. N 2. Si 3. Se The deposition by different MOCVD techniques, together with the exploration of new chemistries for phase change materials to be implemented in next generation non volatile memory devices are the subject of current dissemination of this project. The expected final results, i.e 90 or 45 nm demonstrator of phase change memory device including MOCVD chalcogenide material will have a strong impact on the microelectronic community, since devices including MOCVD grown chalcogenide materials were solely recently reported by Samsung Electronics Co. ("Highly Scalable Phase Change Memory with CVD GeSbTe for Sub 50nm Generation", J.I. Lee, H. Park, S.L. Cho, Y.L. Park, B.J. Bae, J.H. Park, J.S. Park, H.G. An, J.S. Bae, D.H. Ahn, Y.T. Kim, H. Horii, S. A. Song , J.C. Shin, S.O. Park, H.S. Kim, UIn. Chung, J.T. Moon, and B.I. Ryu, VLSI Tech dig. P1203 2007).I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
