The problem of designing VLSI system for converting integers to and from residue number system has been considered by some authors, in an attempt to optimize the area-time complexity of the device /1,2,3,4/. In this paper a new solution is provided, which exhibits VLSI complexity figures beteer than previously proposed in the area of pipelined applications.

An improvement of VLSI binary-residue converters for pipelined processing

1986

Abstract

The problem of designing VLSI system for converting integers to and from residue number system has been considered by some authors, in an attempt to optimize the area-time complexity of the device /1,2,3,4/. In this paper a new solution is provided, which exhibits VLSI complexity figures beteer than previously proposed in the area of pipelined applications.
1986
Istituto di Scienza e Tecnologie dell'Informazione "Alessandro Faedo" - ISTI
VLSI
Residue number system
Area-time complexity
Pipeline
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/364057
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