The architecture of a cache memory, which has been designed to support the memory bandwidth requirements of programs written in Prolog by capturing references to the Prolog stack, is presented. By exploiting the memory behavior of Prolog programs, this architecture achieves a considerable improvement over traditional cache architectures in terms of both performance and hardware complexity.
Limiting the memory bandwidth requirements of prolog programs: the architecture of a copy-back stack cache
1989
Abstract
The architecture of a cache memory, which has been designed to support the memory bandwidth requirements of programs written in Prolog by capturing references to the Prolog stack, is presented. By exploiting the memory behavior of Prolog programs, this architecture achieves a considerable improvement over traditional cache architectures in terms of both performance and hardware complexity.File in questo prodotto:
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Descrizione: Limiting the memory bandwidth requirements of prolog programs: the architecture of a copy-back stack cache
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