A microprocessor-based advanced architecture

We have approached the problem of improving the run-time supports for operating system, high-level languages and programming environments, within the framework of a project aimed at defining a microprocessor-based advanced architecture whose main goal is the reduction of the so-called semantic-gap. The principal features of the resulting architecture are a capability-based addressing scheme, an implementation of tagged memory relying on the concept of tagged segments, a single level store approach to memory management, and significant hardware supports for multitasking. The architecture has actually been implanted as a research prototype, and the most noticeable choice concerning implementation was to give separate hardware support to memory management functionalities: this not only led to a high degree of parallelism in the execution of kernel activities, but also improved the overall manageability and simplified the testing, debugging and tuning phases of system development.