To form crystalline Si dots embedded in SiO2 We have deposited thin films of silicon-rich oxide (SRO) by plasma-enhanced chemical vapor deposition of SiH4 and O-2 Then the materials have been annealed in N-2 ambient at temperatures between 950 degreesC and 1100 degreesC. Under such processing, the supersaturation of Si in the amorphous SRO film produces the formation of crystalline Si dots embedded in SiO2 The narrow dot size distributions, analyzed by transmission electron microscopy, are characterized by average grain radii and standard deviations down to about 1 nm. The memory function of such structures has been investigated in MOS capacitors with a SRO film sandwiched between two thin SiO2 layers as insulator and with an n(+) polycrystalline silicon gate. The operations of write and storage are clearly detected by measurements of hysteresis in capacitance- voltage characteristics. A model which explains both the occurrence of steady-state conduction through the SiO2/SRO/SiO2, stack at a relatively low voltage and the shift of flat-band voltage is presented and discussed.
Memory effects in MOS capacitors with silicon quantum dots
Crupi I;Lombardo S;Fazio B;Bongiorno C
2001
Abstract
To form crystalline Si dots embedded in SiO2 We have deposited thin films of silicon-rich oxide (SRO) by plasma-enhanced chemical vapor deposition of SiH4 and O-2 Then the materials have been annealed in N-2 ambient at temperatures between 950 degreesC and 1100 degreesC. Under such processing, the supersaturation of Si in the amorphous SRO film produces the formation of crystalline Si dots embedded in SiO2 The narrow dot size distributions, analyzed by transmission electron microscopy, are characterized by average grain radii and standard deviations down to about 1 nm. The memory function of such structures has been investigated in MOS capacitors with a SRO film sandwiched between two thin SiO2 layers as insulator and with an n(+) polycrystalline silicon gate. The operations of write and storage are clearly detected by measurements of hysteresis in capacitance- voltage characteristics. A model which explains both the occurrence of steady-state conduction through the SiO2/SRO/SiO2, stack at a relatively low voltage and the shift of flat-band voltage is presented and discussed.File | Dimensione | Formato | |
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