Silicon dioxide films have been deposited at temperatures less than 270 degrees C in an electron cyclotron resonance (ECR) plasma reactor from a gas phase combination of O-2, SiH4 and He. The physical characterization of the material was carried out through pinhole density analysis as a function of substrate temperature for different mu-wave power (E-w). Higher E-w at room deposition temperature (RT) shows low defects densities (< 7 pinhole/mm(2)) ensuring low-temperatures process integration on large area. From FTIR analysis and Thermal Desorption Spectroscopy we also evaluated very low hydrogen content if compared to conventional rf-PECVD SiO2 deposited at 350 degrees C. Electrical properties have been measured in MOS devices, depositing SiO2 at RT. No significant charge injection up to fields 6-7 MV/cm and average breakdown electric field > 10 MV/cm are observed from ramps I-V. Moreover, from high frequency and quasi-static C-V characteristics we studied interface quality as function of annealing time and annealing temperature in N-2. We found that even for low annealing temperature (200 degrees C) is possible to reduce considerably the interface state density down to 5 x 10(11) cm(-2) eV(-1). These results show that a complete low-temperatures process can be achieved for the integration of SiO2 as gate insulator in polysilicon TFTs on plastic substrates.

Silicon dioxide deposite d by ECR-PECVD for low-temperature Si devices

A Pecora;L Maiolo;L Mariucci;G Fortunato;
2005

Abstract

Silicon dioxide films have been deposited at temperatures less than 270 degrees C in an electron cyclotron resonance (ECR) plasma reactor from a gas phase combination of O-2, SiH4 and He. The physical characterization of the material was carried out through pinhole density analysis as a function of substrate temperature for different mu-wave power (E-w). Higher E-w at room deposition temperature (RT) shows low defects densities (< 7 pinhole/mm(2)) ensuring low-temperatures process integration on large area. From FTIR analysis and Thermal Desorption Spectroscopy we also evaluated very low hydrogen content if compared to conventional rf-PECVD SiO2 deposited at 350 degrees C. Electrical properties have been measured in MOS devices, depositing SiO2 at RT. No significant charge injection up to fields 6-7 MV/cm and average breakdown electric field > 10 MV/cm are observed from ramps I-V. Moreover, from high frequency and quasi-static C-V characteristics we studied interface quality as function of annealing time and annealing temperature in N-2. We found that even for low annealing temperature (200 degrees C) is possible to reduce considerably the interface state density down to 5 x 10(11) cm(-2) eV(-1). These results show that a complete low-temperatures process can be achieved for the integration of SiO2 as gate insulator in polysilicon TFTs on plastic substrates.
2005
Istituto di fotonica e nanotecnologie - IFN
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/20922
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