The design of a VLSI chip set implementing a recursive motion estimator (ME) for video applications is described. This chip set can be used to compress the information of a full-motion video source for applications where low-bit-rate or very-low-bit-rate coding is required. The ME block provides for a set of motion vectors describing the displacement of two consecutive frames. The ME structure is partitioned into three main stages: the pseudogradient generator, the recursive displacement generator, and a shared memory array. The recursive approach, in this VLSI implementation, permits a reduction of the system complexity and achieves better quality in a real-time low-bit-rate video decoder.

VLSI Recursive Motion Estimator chip set

V Rampa;
1990

Abstract

The design of a VLSI chip set implementing a recursive motion estimator (ME) for video applications is described. This chip set can be used to compress the information of a full-motion video source for applications where low-bit-rate or very-low-bit-rate coding is required. The ME block provides for a set of motion vectors describing the displacement of two consecutive frames. The ME structure is partitioned into three main stages: the pseudogradient generator, the recursive displacement generator, and a shared memory array. The recursive approach, in this VLSI implementation, permits a reduction of the system complexity and achieves better quality in a real-time low-bit-rate video decoder.
1990
Istituto di Elettronica e di Ingegneria dell'Informazione e delle Telecomunicazioni - IEIIT
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/212109
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