Novel computed and experimental results are achieved with addressing modes capable of video rate speed with equal selection and data voltages and a commercially available PLC mixtures. Total voltage requirements for integrated circuit drivers is strongly reduced and is now made compatible with existing STN driver technology. A new automatic fit procedure, necessary for fast evaluation of cell parameter and subsequent simulation of cell behavior under matrix addressing, is also described. © 1998 OPA (Overseas Publishers Association) N.V.

Video speed low total voltage matrix addressing technique for SSFLC displays

Beccherelli R;
1998

Abstract

Novel computed and experimental results are achieved with addressing modes capable of video rate speed with equal selection and data voltages and a commercially available PLC mixtures. Total voltage requirements for integrated circuit drivers is strongly reduced and is now made compatible with existing STN driver technology. A new automatic fit procedure, necessary for fast evaluation of cell parameter and subsequent simulation of cell behavior under matrix addressing, is also described. © 1998 OPA (Overseas Publishers Association) N.V.
1998
Inglese
214
1
27
34
8
http://www.tandfonline.com/doi/abs/10.1080/00150199808012935#.Uiw3_ha_1lE
Sì, ma tipo non specificato
Addressing technique
Cell behaviors
Cell parameter
Equal voltages
matrix
STN driver technology compatibility
Video rates
Voltage requirement
6
info:eu-repo/semantics/article
262
Beccherelli, R; Ferrara, V; D'Alessandro, A; Campoli, F; Maltese, ; P,
01 Contributo su Rivista::01.01 Articolo in rivista
none
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/212117
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