Standard JEDEC JESD61A.01 Isothermal Electromigration Test Procedure

The isothermal test is an accelerated electromigration test performed on microelectronic metallizations. In the isothermal test, an attempt is made to maintain a constant mean temperature of the line under test, by varying the stress current and hence the amount of Joule heating imparted to the line. Given a known and unvarying thermal resistance of the sample to the ambient, the isothermal test uses a feedback control to maintain a constant power dissipated in the metallization under test, so that a constant test line mean temperature is achieved. When the line resistance changes during the test, due to electromigration damage, the power is kept constant, by varying the stress current. This document presents an algorithm for conducting the isothermal test using computer-controlled instrumentation. The intent is to provide a complete description of a functional isothermal test algorithm that will allow a programmer to implement and start using an accelerated electromigration test with ease. The algorithm is derived from published and unpublished literature. Bibliographic references are listed in Annex C. This standard was formulated under the cognizance of JC-14.2 Committee on Wafer-Level Reliability and approved by the JEDEC Board of Directors (BoD) Ballot JCB-07-20. It was prepared with the contribution of the National Research Council of Italy, Institute for Microelectronics and Microsystems (CNR-IMM) of Bologna, Italy. The present revision JESD61A introduces significant technical changes from the previous edition (EIA/JESD61, April 1997) to make it applicable to copper as well as to aluminum metallizations. Substantive changes to the document are listed in Annex D.