A low-power, low voltage capacitance to pulse duration converter with intrinsic low sensitivity to temperature and parasitic capacitances is presented. The circuit uses a dual clock chopper modulation, which significantly lowers the effects of device mismatch. An effective resolution of 7.2 bits with 3.8 uA supply current and operation down to 0.9 Vdd are demonstrated by means of electrical simulations performed on a prototype designed with the UMC 0.18 um process.
A chopper stabilized, low power capacitance to PWM converter for sensor interfacing
Piotto M
2016
Abstract
A low-power, low voltage capacitance to pulse duration converter with intrinsic low sensitivity to temperature and parasitic capacitances is presented. The circuit uses a dual clock chopper modulation, which significantly lowers the effects of device mismatch. An effective resolution of 7.2 bits with 3.8 uA supply current and operation down to 0.9 Vdd are demonstrated by means of electrical simulations performed on a prototype designed with the UMC 0.18 um process.File in questo prodotto:
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