Schottky Barrier Thin Film Transistor (SB-TFT) on low-temperature polycrystalline silicon

We report on the fabrication and characterization of Schottky barrier transistors on polycrystalline silicon. The transistors were realized exploiting Cr-Si and Ti-Si Schottky barrier with a low thermal budget process, compatible with polymeric, ultraflexible substrates. We obtained devices with threshold voltages as low as 1.7 V (for n channel) and 4 V (for p channel) with channel lengths ranging from 2 to 40 um. Resulting on/off ratios are as high as 5 *10^3. The devices showed threshold voltages and subthreshold slopes comparable with already published N- and P-MOS devices realized with the same process on polyimide substrates thus representing a cheaper and scalable alternative to ultraflexible transistors with doped source and drain.