We consider the problem of reconfiguring a 2-dimensional VLSI array with faulty cells. A network flow model of the problem is formulated and an algorithm is presented for interconnecting the functional cells of the array so that they simulate a fault-free array of smaller size. Experimental results on the practical performance of this algorithm and of other techniques previously proposed in the literature are reported.
Efficient reconfiguration of VLSI arrays (Extended Abstract)
Codenotti B;
1988
Abstract
We consider the problem of reconfiguring a 2-dimensional VLSI array with faulty cells. A network flow model of the problem is formulated and an algorithm is presented for interconnecting the functional cells of the array so that they simulate a fault-free array of smaller size. Experimental results on the practical performance of this algorithm and of other techniques previously proposed in the literature are reported.File in questo prodotto:
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Descrizione: Efficient reconfiguration of VLSI arrays (Extended Abstract)
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