A virtual address cache memory, whose operation is controlled explicitly by software, is presented. Ad hoc hardware mechanisms, including new machine instructions and a new operand addressing mode, reduce the complexity of cache management logic in favor of the capacity of the cache, and solve the major problem of virtual address cache organization: two or more virtual addresses mapping into the same real address.
Virtual address cache with no reverse address buffering
1988
Abstract
A virtual address cache memory, whose operation is controlled explicitly by software, is presented. Ad hoc hardware mechanisms, including new machine instructions and a new operand addressing mode, reduce the complexity of cache management logic in favor of the capacity of the cache, and solve the major problem of virtual address cache organization: two or more virtual addresses mapping into the same real address.File in questo prodotto:
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