In this paper we propose a simulation study to carry out dynamic analysis of CNTFET-based digital circuit, introducing in the semi-empirical compact model for CNTFETs, already proposed by us, both the quantum capacitance effects and the sub-threshold currents. To verify the validity of the obtained results, a comparison with Wong model was carried out. Our model may be easily implemented both in SPICE and in Verilog-A, obtaining, in this last case, the development time in writing the model shorter, the simulation run time much shorter and the software much more concise and clear than Wong model.

Dynamic simulation of CNTFET-based digital circuits

Marani R;
2018

Abstract

In this paper we propose a simulation study to carry out dynamic analysis of CNTFET-based digital circuit, introducing in the semi-empirical compact model for CNTFETs, already proposed by us, both the quantum capacitance effects and the sub-threshold currents. To verify the validity of the obtained results, a comparison with Wong model was carried out. Our model may be easily implemented both in SPICE and in Verilog-A, obtaining, in this last case, the development time in writing the model shorter, the simulation run time much shorter and the software much more concise and clear than Wong model.
2018
dynamic analysis
cntfet circuit
model implementation
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/424435
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