In this paper we simulate the effects of temperature in CNTFETs-based digital circuits, enhancing a compact model, already proposed by us, in which the temperature variation in the drain current equation and in energy bandgap is considered. Using ADS software, we simulate some basic digital circuits including NOT, NOR and NAND logic gates. In particular we observe how typical quantities like noise margin and static power vary in relation to temperature and supply voltage. At last we find that generally the most critical working condition is at high temperatures with some exceptions depending on supply voltage applied.

Effects of temperature in CNTFET-based design of digital circuits

Marani R;
2018

Abstract

In this paper we simulate the effects of temperature in CNTFETs-based digital circuits, enhancing a compact model, already proposed by us, in which the temperature variation in the drain current equation and in energy bandgap is considered. Using ADS software, we simulate some basic digital circuits including NOT, NOR and NAND logic gates. In particular we observe how typical quantities like noise margin and static power vary in relation to temperature and supply voltage. At last we find that generally the most critical working condition is at high temperatures with some exceptions depending on supply voltage applied.
2018
Inglese
7
M41
M48
http://www.scopus.com/record/display.url?eid=2-s2.0-85044947284&origin=inward
digital circuits
temperature effects
CNTFET
1
info:eu-repo/semantics/article
262
Gelao G.; Marani R.; Perri A.G.
01 Contributo su Rivista::01.01 Articolo in rivista
none
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/424474
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