a-Si/c-Si heterojunction solar cells represent one of the most promising photovoltaic devices for terrestrial use. One of the key factor in fabricating high efficiency heterojunction cells is the defect passivation at the interface between amorphous silicon and crystalline silicon, usually achieved with a thin intrinsic buffer layer. It is known from the literature that a very thin intrinsic amorphous layer, about 5 nm thick, deposited between the doped layers, produces a significant enhancement in the open circuit voltage (Voc) of the device, above 600 mV, due to a reduction in carrier recombination centers. However, we find that during the deposition step of the amorphous intrinsic layer, an uncontrolled and unwanted growth of crystalline grains at the interface with the crystalline silicon may occur. In this case an open circuit voltage decrease is observed, because of the generation of carrier recombination paths along the grain boundaries. Such a problem can be avoided using a totally epitaxial intrinsic layer instead of the amorphous layer. The epitaxial layer is deposited using a high hydrogen dilution of silane, which gives a low deposition rate and, on a crystalline substrate, results in an energetically favoured ordered crystalline growth with respect to the growth of a totally amorphous structure. Our results show that an epitaxial intrinsic layer achieves a good interface defect passivation. The devices with the epitaxial buffer layer show a Voc over 600 mV, even better than that obtained with the amorphous layer

Silicon Heterojunction Solar Cell: a new buffer layer concept with epitaxial silicon

2003

Abstract

a-Si/c-Si heterojunction solar cells represent one of the most promising photovoltaic devices for terrestrial use. One of the key factor in fabricating high efficiency heterojunction cells is the defect passivation at the interface between amorphous silicon and crystalline silicon, usually achieved with a thin intrinsic buffer layer. It is known from the literature that a very thin intrinsic amorphous layer, about 5 nm thick, deposited between the doped layers, produces a significant enhancement in the open circuit voltage (Voc) of the device, above 600 mV, due to a reduction in carrier recombination centers. However, we find that during the deposition step of the amorphous intrinsic layer, an uncontrolled and unwanted growth of crystalline grains at the interface with the crystalline silicon may occur. In this case an open circuit voltage decrease is observed, because of the generation of carrier recombination paths along the grain boundaries. Such a problem can be avoided using a totally epitaxial intrinsic layer instead of the amorphous layer. The epitaxial layer is deposited using a high hydrogen dilution of silane, which gives a low deposition rate and, on a crystalline substrate, results in an energetically favoured ordered crystalline growth with respect to the growth of a totally amorphous structure. Our results show that an epitaxial intrinsic layer achieves a good interface defect passivation. The devices with the epitaxial buffer layer show a Voc over 600 mV, even better than that obtained with the amorphous layer
2003
Istituto per la Microelettronica e Microsistemi - IMM
Silicon Heterojunction
solar cells
buffer layer
epitaxial silicon
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/434172
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