We present a method to match the output and transconductance characteristics between two CNTFET models proposed in literature. Then we briefly describe a compact noise model, used to simulate the noise performance of a phase shift oscillator, in order to analyse how the noise sources, constitute a significant limitation for circuits based on CNTFET. All simulations have been obtained in Verilog-A, and for this we indicated the code lines to add to the software to be able to do the proposed noise analysis.

Noise analysis of a phase shift oscillator based on CNTFET

2022

Abstract

We present a method to match the output and transconductance characteristics between two CNTFET models proposed in literature. Then we briefly describe a compact noise model, used to simulate the noise performance of a phase shift oscillator, in order to analyse how the noise sources, constitute a significant limitation for circuits based on CNTFET. All simulations have been obtained in Verilog-A, and for this we indicated the code lines to add to the software to be able to do the proposed noise analysis.
2022
CNTFET
Modelling
Noise sources
Phase shift oscillator
Verilog-A
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/452317
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