The recent availability of quantum annealers has fueled a new area of information technology where such devices are applied to address practically motivated and computationally difficult problems with hardware that exploits quantum mechanical phenomena. D-Wave annealers are promising platforms to solve these problems in the form of quadratic unconstrained binary optimization. Here we provide a formulation of the Chinese postman problem that can be used as a tool for probing the local connectivity of graphs and networks. We treat the problem classically with a tabu algorithm and simulated annealing, and using a D-Wave device. The efficiency of quantum annealing with respect to the simulated annealing has been demonstrated using the optimal time to solution metric. We systematically analyze computational parameters associated with the specific hardware. Our results clarify how the interplay between the embedding due to limited connectivity of the Chimera graph, the definition of logical qubits, and the role of spin-reversal controls the probability of reaching the expected solution.

Investigating the Chinese postman problem on a quantum annealer

Siloi, Ilaria;Di Felice, Rosa
2021

Abstract

The recent availability of quantum annealers has fueled a new area of information technology where such devices are applied to address practically motivated and computationally difficult problems with hardware that exploits quantum mechanical phenomena. D-Wave annealers are promising platforms to solve these problems in the form of quadratic unconstrained binary optimization. Here we provide a formulation of the Chinese postman problem that can be used as a tool for probing the local connectivity of graphs and networks. We treat the problem classically with a tabu algorithm and simulated annealing, and using a D-Wave device. The efficiency of quantum annealing with respect to the simulated annealing has been demonstrated using the optimal time to solution metric. We systematically analyze computational parameters associated with the specific hardware. Our results clarify how the interplay between the embedding due to limited connectivity of the Chimera graph, the definition of logical qubits, and the role of spin-reversal controls the probability of reaching the expected solution.
2021
Istituto Nanoscienze - NANO
Istituto Nanoscienze - NANO - Sede Secondaria Modena
D-Wave, Quantum annealing, QUBO, routing problems
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/476464
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