In this work the breakdown properties of silicon nanowires fabricated with a top-down approach are investigated. The breaking voltages and currents of devices based on suspended silicon nanowires with different cross-section widths have been determined. It has been found that devices can be fused using a bias current in the range of 20 lA for sufficiently thin nanowires. In this way a device based on a single nanowire can be used for the fabrication of a fully CMOS-compatible one-time programmable (OTP) memory cell, where the wire conductance distinguishes the ON/OFF states. In the normal operation mode (ON state) the dissipated power can be very low. The solution seems to be promising in terms of scalability and low power consumption, which is a key factor in portable systems.

Investigation of silicon nanowire breakdown properties for the realization of one-time programmable memories

Massimo Piotto
2011

Abstract

In this work the breakdown properties of silicon nanowires fabricated with a top-down approach are investigated. The breaking voltages and currents of devices based on suspended silicon nanowires with different cross-section widths have been determined. It has been found that devices can be fused using a bias current in the range of 20 lA for sufficiently thin nanowires. In this way a device based on a single nanowire can be used for the fabrication of a fully CMOS-compatible one-time programmable (OTP) memory cell, where the wire conductance distinguishes the ON/OFF states. In the normal operation mode (ON state) the dissipated power can be very low. The solution seems to be promising in terms of scalability and low power consumption, which is a key factor in portable systems.
2011
Istituto di Elettronica e di Ingegneria dell'Informazione e delle Telecomunicazioni - IEIIT
OTP
Silicon nanowires
CMOS
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/50169
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