Impact of Parallel Gating on Gate Fidelities in Linear, Square, and Star Arrays of Noisy Flip-Flop Qubits

Successfully implementing a quantum algorithm involves maintaining a low logical error rate by ensuring the validity of the quantum fault-tolerance theorem. The required number of physical qubits arranged in an array depends on the chosen Quantum Error Correction code and the achievable physical qubit error rate. As the qubit count in the array increases, parallel gating —simultaneously manipulating many qubits— becomes a crucial ingredient for successful computation. In this study, small arrays of a type of donor- and quantum dot-based qubits, known as flip-flop (FF) qubits, are investigated. Simulation results of gate fidelities in linear, square and star arrays of four FF qubits affected by realistic 1/f noise are presented to study the effect of parallel gating. The impact of two, three and four parallel one-qubit gates, as well as two parallel two-qubit gates, on fidelity is calculated by comparing different array geometries. The findings can contribute to the optimized manipulation of small FF qubit arrays and the design of larger ones.