Threshold voltage instability in SiC power MOSFETs

Charge trapping and de-trapping phenomena in SiC power MOSFETs were investigated by performing two different types of electrical characterization: hysteresis and positive bias temperature instability (PBTI) measurements. A positive stress voltage to the gate results in positive threshold voltage shift (ΔVT), which can be fully recovered by applying a small negative voltage. This fully recoverable ΔVT behavior is ascribed to the trapping and de-trapping of electrons from the SiC layer into the pre-existing interface or oxide traps and vice versa. The apparent anomalous decrease of the trapped charge with temperature is ascribed to the faster de-trapping which occurs at higher temperature during the measurement delay between the stress and the sense phase. The trapping rate exhibits a universal decreasing behavior as a function of the trapped charges, independently of stress voltage and stress temperature.