A process for manufacturing a strained semiconductor device envisages: providing a die of semiconductor material, in which elementary components of the semiconductor device have been integrated by means of initial front-end steps; and coupling, using the die-attach technique, the die to a support, at a coupling temperature. The aforesaid coupling step envisages selecting the value of the coupling temperature at a value higher than an operating temperature of use of the semiconductor device, and moreover selecting the material of the support so that it is different from the material of the die in order to determine, at the operating temperature, a coupling stress that is a function of the different values of the coefficients of thermal expansion of the materials of the die and of the support and of the temperature difference between the coupling temperature and the operating temperature. Furthermore, additional stress can be enhanced by means of different embodiments involving the support, such as ring or multi-layer frame.

Process for manufacturing a strained semiconductor device and corresponding strained semiconductor device

Giuseppe D'Arrigo
Ultimo
Membro del Collaboration Group
2023

Abstract

A process for manufacturing a strained semiconductor device envisages: providing a die of semiconductor material, in which elementary components of the semiconductor device have been integrated by means of initial front-end steps; and coupling, using the die-attach technique, the die to a support, at a coupling temperature. The aforesaid coupling step envisages selecting the value of the coupling temperature at a value higher than an operating temperature of use of the semiconductor device, and moreover selecting the material of the support so that it is different from the material of the die in order to determine, at the operating temperature, a coupling stress that is a function of the different values of the coefficients of thermal expansion of the materials of the die and of the support and of the temperature difference between the coupling temperature and the operating temperature. Furthermore, additional stress can be enhanced by means of different embodiments involving the support, such as ring or multi-layer frame.
2023
Istituto per la Microelettronica e Microsistemi - IMM
STRAINED SEMICONDUCTOR
File in questo prodotto:
File Dimensione Formato  
US11837558.pdf

accesso aperto

Tipologia: Versione Editoriale (PDF)
Licenza: Altro tipo di licenza
Dimensione 837.62 kB
Formato Adobe PDF
837.62 kB Adobe PDF Visualizza/Apri

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/523815
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus ND
  • ???jsp.display-item.citation.isi??? ND
social impact