TiN layers have been used as diffusion barriers to prevent intermixing of aluminium and silicon. During TiN deposition on Ti by reactive sputtering, oxygen has been introduced in-situ into the barrier. Depending on the oxygen flow, a different content of oxygen has been incorporated into the TiN layer during the growth. The layer composition, resistivity and stress are very sensitive to this content. To improve the effectiveness of the barrier, the microstructure of the TiN(O) layer has been optimised on blanket films. Nevertheless, on devices, depletion of nitrogen has been found at the bottom of the contact hole due to geometrical flux variation. This deficiency, that causes the aluminium to spike into the barrier, has been balanced by increasing the nitrogen flow during deposition. In this way, Al penetration towards the silicon substrate has been prevented and the base current of npn transistors do not increase when annealing up to 480¬?C 1 h. ¬© 2002 Elsevier Science B.V. All rights reserved.
Correlation between microstructure control, density and diffusion barrier properties of TiN(O) films
Alberti A;La Via F;Bongiorno C;
2002
Abstract
TiN layers have been used as diffusion barriers to prevent intermixing of aluminium and silicon. During TiN deposition on Ti by reactive sputtering, oxygen has been introduced in-situ into the barrier. Depending on the oxygen flow, a different content of oxygen has been incorporated into the TiN layer during the growth. The layer composition, resistivity and stress are very sensitive to this content. To improve the effectiveness of the barrier, the microstructure of the TiN(O) layer has been optimised on blanket films. Nevertheless, on devices, depletion of nitrogen has been found at the bottom of the contact hole due to geometrical flux variation. This deficiency, that causes the aluminium to spike into the barrier, has been balanced by increasing the nitrogen flow during deposition. In this way, Al penetration towards the silicon substrate has been prevented and the base current of npn transistors do not increase when annealing up to 480¬?C 1 h. ¬© 2002 Elsevier Science B.V. All rights reserved.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
