This work illustrates a study on GaN HEMT switch RF performances dependence on material and fabrication technology. For said study different Gate technologies has been fabricated on the same wafer and successively characterized, and for a fixed gate geometry (T-Gate) different substrate properties have been evaluated. In particular switch transistor performances in terms of OFF-state Isolation, ON-state Insertion Loss, and associated power handling, have been related to differences in Gate technologies and material properties. The results of this study indicate that for fixed gate peripheries and device switching times, key parameters such as COFF can be appreciably improved by the adoption of an optimized GaN Fe doped buffer wafer and Metal-Insulator-Semiconductor Gate technology. The same MIS-Gate device can also provide up to 1.5dB higher input power ON-state Insertion Loss 1dB compression. © 2009 EuMA.

Gate technology and substrate property influence on GaN HEMT switch device performance

Giovine Ennio
2009

Abstract

This work illustrates a study on GaN HEMT switch RF performances dependence on material and fabrication technology. For said study different Gate technologies has been fabricated on the same wafer and successively characterized, and for a fixed gate geometry (T-Gate) different substrate properties have been evaluated. In particular switch transistor performances in terms of OFF-state Isolation, ON-state Insertion Loss, and associated power handling, have been related to differences in Gate technologies and material properties. The results of this study indicate that for fixed gate peripheries and device switching times, key parameters such as COFF can be appreciably improved by the adoption of an optimized GaN Fe doped buffer wafer and Metal-Insulator-Semiconductor Gate technology. The same MIS-Gate device can also provide up to 1.5dB higher input power ON-state Insertion Loss 1dB compression. © 2009 EuMA.
2009
Istituto di fotonica e nanotecnologie - IFN
9782874870125
Gallium nitride
Switch transistors
Gate technology
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/362149
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