This study addresses the poor crystal quality and wafer cracks experienced by 3C-SiC films grown on (111) Si substrates, which prevent access to bulk growth. By employing a novel Chemical Vapor Deposition (CVD) growth method on 4-inch Si substrates, it was possible to grow a layer of (111) 3C-SiC that was 230 μm thick, achieved by melting the Si substrate in the CVD chamber. The resulting free-standing 3C-SiC was then utilized to grow a bulk (111) 3C-SiC layer under high N fluxes. After molten KOH etching, the SEM examination demonstrated a considerable decrease in the density of stacking faults (SFs) with values of (7.16±0.04)×103 cm−1 in heteroepitaxial step while SFs density shifts to (0.4±0.3)×103 cm−1 when using a N 2 flux of 1600 sccm. The emission linked to point defects is, also, significantly reduced in (111) 3C-SiC with respect to (100) 3C-SiC growth. Scanning Transmission Electron Microscopy (STEM) analysis revealed a different pattern of evolution during (111) growths, where SFs shred but do not interrupt each other during growth. The reduction of SF atomic layers and SF self-closure appears to be the decrease in the number of atomic planes that comprise SF layers. High Angle Annular Dark Field-Scanning Transmission Electron Microscopy (HAADF-STEM) revealed how the crystal works to eliminate lattice mismatch and smooth out the SF until it is removed. These findings highlight the importance of matching growth parameters with defect kinetics to promote the adoption of (111) 3C-SiC in high-performance devices.

Assessing innovative bulk (111) 3C-SiC epitaxial growth

Calabretta C.;Scuderi V.;Bongiorno C.;Anzalone R.;Boninelli S.;La Via F.
2024

Abstract

This study addresses the poor crystal quality and wafer cracks experienced by 3C-SiC films grown on (111) Si substrates, which prevent access to bulk growth. By employing a novel Chemical Vapor Deposition (CVD) growth method on 4-inch Si substrates, it was possible to grow a layer of (111) 3C-SiC that was 230 μm thick, achieved by melting the Si substrate in the CVD chamber. The resulting free-standing 3C-SiC was then utilized to grow a bulk (111) 3C-SiC layer under high N fluxes. After molten KOH etching, the SEM examination demonstrated a considerable decrease in the density of stacking faults (SFs) with values of (7.16±0.04)×103 cm−1 in heteroepitaxial step while SFs density shifts to (0.4±0.3)×103 cm−1 when using a N 2 flux of 1600 sccm. The emission linked to point defects is, also, significantly reduced in (111) 3C-SiC with respect to (100) 3C-SiC growth. Scanning Transmission Electron Microscopy (STEM) analysis revealed a different pattern of evolution during (111) growths, where SFs shred but do not interrupt each other during growth. The reduction of SF atomic layers and SF self-closure appears to be the decrease in the number of atomic planes that comprise SF layers. High Angle Annular Dark Field-Scanning Transmission Electron Microscopy (HAADF-STEM) revealed how the crystal works to eliminate lattice mismatch and smooth out the SF until it is removed. These findings highlight the importance of matching growth parameters with defect kinetics to promote the adoption of (111) 3C-SiC in high-performance devices.
2024
Istituto per la Microelettronica e Microsistemi - IMM
111 3C-SiC, stacking faults
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/524297
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