Silicon Nanowires (Si-NWs) are obtained by vapor-liquid-solid growth using an inductively coupled chemical vapor deposition system which works at temperatures lower than 400 °C. Gold nanodots are used as metal catalyst. The selective growth of Si-NWs on the gold nanodots is obtained by controlling the contribution coming from the uncatalyzed growth on the bare Si substrate. In this way the final NW length can be controlled, and it is not influenced by the thickness of the uncatalyzed layer. The important parameter ruling the NW growth is found to be the plasma power which governs the dissociation of the Si precursor gas. Final NW lengths of 1 um are obtained at temperatures of 380 °C with a thickness of uncatalyzed layer equal to zero. Also the NW density is addressed in this work and it is optimised by increasing the gold equivalent thickness. The NW density is increased from 2.9e8 to 1.3e10 cm-2, when the gold equivalent thickness passes from 1.8 nm to 2.2 nm.

Silicon Nanowires Obtained by Low Temperature Plasma-Based Chemical Vapor Deposition.

R A Puglisi;G Mannino;S Scalese;A La Magna;V Privitera
2012

Abstract

Silicon Nanowires (Si-NWs) are obtained by vapor-liquid-solid growth using an inductively coupled chemical vapor deposition system which works at temperatures lower than 400 °C. Gold nanodots are used as metal catalyst. The selective growth of Si-NWs on the gold nanodots is obtained by controlling the contribution coming from the uncatalyzed growth on the bare Si substrate. In this way the final NW length can be controlled, and it is not influenced by the thickness of the uncatalyzed layer. The important parameter ruling the NW growth is found to be the plasma power which governs the dissociation of the Si precursor gas. Final NW lengths of 1 um are obtained at temperatures of 380 °C with a thickness of uncatalyzed layer equal to zero. Also the NW density is addressed in this work and it is optimised by increasing the gold equivalent thickness. The NW density is increased from 2.9e8 to 1.3e10 cm-2, when the gold equivalent thickness passes from 1.8 nm to 2.2 nm.
2012
Istituto per la Microelettronica e Microsistemi - IMM
978-1-60511-385-2
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/20.500.14243/6484
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