Nanoscale probing of dielectric breakdown at SiO2/3C-SiC interfaces

Thin (6-7 nm) SiO2 layers were thermally grown onto cubic silicon carbide (3C-SiC) heteroepitaxial layers of different surface roughness and with different types of near-surface epitaxial defects. Localized dielectric breakdown (BD) was studied by electrically stressing the system using conductive atomic force microscopy (C-AFM), which constitutes a means to directly and simultaneously observe localized dielectric failure as a function of stress time and surface morphology with nanoscale lateral resolution. AFM and scanning capacitance microscopy (SCM) were used to monitor defects and the morphological and capacitive uniformities of the SiO2, respectively, while capacitance-voltage (C-V) measurements were used to evaluate the presence of charges and traps in the oxide layers. The BD kinetics was evaluated by fitting the experimental failure ratios as a function of the stress time to the failure probability described by Weibull statistics, in turn allowing a distinction to be made between defect-induced (extrinsic) and intrinsic dielectric BD events. The results give useful information about how morphological features at the 3C-SiC surface as well as trapped charges influence the BD generation in thermally grown oxides on this polytype. (C) 2011 American Institute of Physics. [doi: 10.1063/1.3525806]