Advanced characterizations of insulator/semiconductor interfaces in SiC and GaN

In this paper, some aspects of the characterization of interfaces between insulators and wide band semiconductors (WBG) are presented, with a focus on the SiO2/SiC and SiO2/GaN systems. Capacitance, conductance and current measurements (also as a function of time) are employed to investigate trapping states in metal/oxide/semiconductor (MOS) structures on both SiC and GaN. In particular, parallel conductance vs frequency measurements can be used to distinguish slow and fast interface states in SiC-MOS and GaN-MOS. Furthermore, time-dependent gate current measurements allows to get insights into the near interface traps (NITs) present inside the SiO2 layer. In these systems, although post oxide deposition annealing treatments can reduce the interface traps (down to the 1011-1012cm-2eV-1 range), the presence of the NITs can be responsible for an anomalous behavior of the current conduction, penalizing the threshold voltage stability. Time-dependent current and conductance measurements, performed in appropriate bias ranges, enable to quantify the density of NITs (~1012cm-2), and to estimate their position inside the insulator (~ 1-1.5 nm far from the semiconductor interface). The impact of the observed trapping phenomena on the SiO2/SiC(GaN) transistor operation is briefly discussed.